1. Technical Field
The present invention relates to a multilayer printed circuit board (referred to as a “multilayer PCB”), and more particularly, to a multilayer printed circuit board capable of reducing overlapping of external electromagnetic noise at interconnections including via connections between layers.
This application claims priority to and the benefit of Japanese Patent Applications No. 2008-086209 filed on Mar. 28, 2008, the disclosure of which is incorporated herein by reference.
2. Description of the Related Art
In a conventional multilayer printed circuit board (PCB), interconnections having via connections are generally provided between large-scale integrations (LSIs), or the like, mounted on a board.
Such a conventional multilayer PCB has, for example, a double-sided mounting structure in which components of the LSI, or the like, are disposed on both surfaces thereof, as shown in FIG. 9. In addition, similarly, even in the multilayer PCB in which components are mounted on one surface thereof, in order to efficiently mount a plurality of interconnections with a high density, the interconnections are performed by via connections.
Meanwhile, in the multilayer PCB, it is known that the interconnection is affected by electromagnetic noise when the above-mentioned via connection is performed. As an example of such a problem, the problem that the characteristics are deteriorated due to the via connection with regard to noise leakage to the exterior is disclosed in the following Patent Document 1 (for example, refer Paragraphs 0007 to 0010 of Patent Document 1).
In the technique disclosed in Patent Document 1, in order to solve the above-mentioned problem, an interconnection structure shown in FIG. 10 has been proposed. In Patent Document 1, vias 341 and 342 in contact with each other near a clearance are disposed between layers having the clearance, through which a via interconnection passes. These additional vias are used as a part of a feedback circuit of the corresponding interconnection, thereby improving noise characteristics.
In addition, in Patent Document 2, with regard to a technique of via connection, a structure for reducing noise transmitted through vias has been proposed (see also FIG. 11). In Patent Document 2, the vias are not disposed in a straight line, but they are disposed at different levels at predetermined intervals like the vias 422 and 423 shown in FIG. 11. As a result, the noise transmitted through the vias can be reduced. In addition, in Patent Document 2, an interconnection 421 is installed to connect the vias 422 and 423.
Further, in addition to the techniques disclosed in Patent Documents 1 and 2, various electromagnetic compatibility improvement countermeasures using many electronic components such as a filter circuit, or the like, are used as general noise solutions when via connection is provided on a multilayer PCB.
However, the multilayer PCB used in the related art has the following problems.
First, when external electromagnetic noise such as electrostatic discharge noise, or the like, is applied to a ground of the multilayer PCB, noise is induced between the interconnection and the ground of the via connection by noise current flowing to the ground.
This phenomenon is attributed to the ground of the LSI from and to which the interconnection is extracted, differential mode noise of coupling paths caused by applying the noise to the corresponding interconnection, or the like. Detailed descriptions thereof will be made below.
Second, coupling of the electrostatic discharge noise may be generated by radiation in the air of noise application places, i.e., by an electromagnetic field of external noise. Coupling of the electromagnetic field noise of the radiation in the air may also be easily generated at the via portion.
In order to solve the second problem, techniques of reducing noise discharged to the exterior due to current flowing through a circuit have been proposed. The techniques are disclosed in Patent Documents 1 and 2.
However, while the techniques of Patent Documents 1 and 2 show a certain effect even on influence of a circuit current caused by the external noise because of its reversibility, they are not effective against the above-mentioned first problem of a different noise coupling mechanism.
In addition, when an additional filter circuit is used, there is a possibility of causing new problems such as an increase in price due to addition of components thereof, provision of component disposition places, a reduction in residual energy due to electrical loss of components constituting the filter circuit, or the like.    Patent Document 1: Japanese Unexamined Patent Publication, First Publication No. 2007-250645    Patent Document 2: Japanese Unexamined Patent Publication, First Publication No. 2000-208939